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All-digital reconfigurable STDCC radar baseband implementation in FPGA

datacite.subject.sdg03:Saúde de Qualidade
datacite.subject.sdg10:Reduzir as Desigualdades
datacite.subject.sdg11:Cidades e Comunidades Sustentáveis
dc.contributor.authorDuarte, Luís
dc.contributor.authorRibeiro, Carlos
dc.contributor.authorAlves, Luís N.
dc.contributor.authorCaldeirinha, Rafael F. S.
dc.date.accessioned2025-07-25T16:31:26Z
dc.date.available2025-07-25T16:31:26Z
dc.date.issued2020-07
dc.descriptionEISBN - 978-1-7281-6743-5
dc.descriptionArticle number - 9249556; Conference date - 20 July 2020 - 22 July 2020; Conference code - 164941
dc.description.abstractThis paper reports the architecture of an all-digital Swept Time-Delay Cross-Correlator (STDCC) baseband. Until recently, the sliding correlator technique has been mainly em-ployed for sounding the radio propagation channel. However, recent benchmarks have shown promising results in target detection context when compared to commercially available solutions. STDCC takes advantage of the sliding correlation properties of Pseudo-Noise (PN) sequences. Therefore, this paper presents the baseband generation for this new radar technique with on-the-fly sequence tuning using a Field-Programmable Gate Array (FPGA). The reconfigurable STDCC radar baseband generates both PN sequences digitally and requires a low-cost ADC to acquire the time dilated result. At the end, the proposed architecture is evaluated regarding resource usage efficiency and then the radar performance will be discussed in terms of the all-digital PN sequence spectrum and the real-time slide correlation. Our analysis confirmed a strong correlation between both sequence length and sampling frequency with radar detectable distance.eng
dc.description.sponsorshipThis work is partially funded by Research and Technological Development Incentive Scheme CO-PROMOTION -Centro2020 - P2020 - European Regional Development Funds, under project RADAVANT - Radar for Detection and Avoidance in Unmanned Aerial Vehicles (PI nr. 033907), by H2020/MSCA-ITN funding program under the framework of European Training Network on Visible Light Based Interoperability and Networking, project (VisIoN) grant agreement no 764461, and by FCT/MCTES through national funds and when applicable, co-funded EU funds under the project UIDB/EEA/50008/2020.
dc.identifier.citationL. Duarte, C. Ribeiro, L. N. Alves and R. F. S. Caldeirinha, "All-digital reconfigurable STDCC radar baseband implementation in FPGA," 2020 12th International Symposium on Communication Systems, Networks and Digital Signal Processing (CSNDSP), Porto, Portugal, 2020, pp. 1-6, doi: https://doi.org/10.1109/CSNDSP49049.2020.9249556.
dc.identifier.doi10.1109/csndsp49049.2020.9249556
dc.identifier.isbn978-1-7281-6743-5
dc.identifier.isbn978-1-7281-6051-1
dc.identifier.urihttp://hdl.handle.net/10400.8/13783
dc.language.isoeng
dc.peerreviewedyes
dc.publisherIEEE Canada
dc.relationEuropean Training Network on Visible light based Interoperability and Networking
dc.relation.hasversionhttps://ieeexplore.ieee.org/document/9249556
dc.relation.ispartof2020 12th International Symposium on Communication Systems, Networks and Digital Signal Processing (CSNDSP)
dc.rights.uriN/A
dc.subjectRADAR
dc.subjectSTDCC
dc.subjectPN sequences
dc.subjectFPGA
dc.titleAll-digital reconfigurable STDCC radar baseband implementation in FPGAeng
dc.typeconference paper
dspace.entity.typePublication
oaire.awardTitleEuropean Training Network on Visible light based Interoperability and Networking
oaire.awardURIhttp://hdl.handle.net/10400.8/13782
oaire.citation.conferenceDate2020-07
oaire.citation.conferencePlacePorto, Portugal
oaire.citation.title2020 12th International Symposium on Communication Systems, Networks and Digital Signal Processing (CSNDSP)
oaire.fundingStreamEuropean Training Networks
oaire.versionhttp://purl.org/coar/version/c_970fb48d4fbd8a85
person.familyNameDuarte
person.familyNameRibeiro
person.familyNameCaldeirinha
person.givenNameLuis
person.givenNameCarlos
person.givenNameRafael
person.identifier.ciencia-id4D18-2B1E-0960
person.identifier.orcid0000-0001-8457-8181
person.identifier.orcid0000-0001-7484-6779
person.identifier.orcid0000-0003-0297-7870
person.identifier.ridF-1499-2015
person.identifier.scopus-author-id7801603527
relation.isAuthorOfPublication0c9f2f59-39a4-4013-87eb-dd92c0fb8a9d
relation.isAuthorOfPublicationa388f639-664e-435c-8e1a-d6aee9213f70
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relation.isAuthorOfPublication.latestForDiscovery0c9f2f59-39a4-4013-87eb-dd92c0fb8a9d
relation.isProjectOfPublication65341980-15c5-4ae1-af0c-ddc440e49173
relation.isProjectOfPublication.latestForDiscovery65341980-15c5-4ae1-af0c-ddc440e49173

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This paper reports the architecture of an all-digital Swept Time-Delay Cross-Correlator (STDCC) baseband. Until recently, the sliding correlator technique has been mainly em-ployed for sounding the radio propagation channel. However, recent benchmarks have shown promising results in target detection context when compared to commercially available solutions. STDCC takes advantage of the sliding correlation properties of Pseudo-Noise (PN) sequences. Therefore, this paper presents the baseband generation for this new radar technique with on-the-fly sequence tuning using a Field-Programmable Gate Array (FPGA). The reconfigurable STDCC radar baseband generates both PN sequences digitally and requires a low-cost ADC to acquire the time dilated result. At the end, the proposed architecture is evaluated regarding resource usage efficiency and then the radar performance will be discussed in terms of the all-digital PN sequence spectrum and the real-time slide correlation. Our analysis confirmed a strong correlation between both sequence length and sampling frequency with radar detectable distance.
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