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- A Software-Defined Radio for Future Wireless Communication Systems at 60 GHzPublication . Gomes, Rodolfo; Duarte, Luis; Ribeiro, Carlos; Caldeirinha, RafaelThis paper reports on a complete end-to-end 5G mmWave testbed fully reconfigurable based on a FPGA architecture. The proposed system is composed of a baseband/low-IF processing unit, and a mmWave RF front-end at both TX/RX ends. In particular, the baseband unit design is based on a typical agile digital IF architecture, enabling on-the-fly modulations up to 256-QAM. The real-time 5G mmWave testbed, herein presented, adopts OFDM as the transmission scheme waveform, which was assessed OTA by considering the key performance indicators, namely EVM and BER. A detailed overview of system architecture is addressed together with the hardware considerations taken into account for the mmWave testbed development. Following this, it is demonstrated that the proposed testbed enables real-time multi-stream transmissions of UHD video content captured by nine individual cameras, which is in fact one of the killing applications for 5G.
- All-digital reconfigurable STDCC radar baseband implementation in FPGAPublication . Duarte, Luís; Ribeiro, Carlos; Alves, Luís N.; Caldeirinha, Rafael F. S.This paper reports the architecture of an all-digital Swept Time-Delay Cross-Correlator (STDCC) baseband. Until recently, the sliding correlator technique has been mainly em-ployed for sounding the radio propagation channel. However, recent benchmarks have shown promising results in target detection context when compared to commercially available solutions. STDCC takes advantage of the sliding correlation properties of Pseudo-Noise (PN) sequences. Therefore, this paper presents the baseband generation for this new radar technique with on-the-fly sequence tuning using a Field-Programmable Gate Array (FPGA). The reconfigurable STDCC radar baseband generates both PN sequences digitally and requires a low-cost ADC to acquire the time dilated result. At the end, the proposed architecture is evaluated regarding resource usage efficiency and then the radar performance will be discussed in terms of the all-digital PN sequence spectrum and the real-time slide correlation. Our analysis confirmed a strong correlation between both sequence length and sampling frequency with radar detectable distance.
- STDCC radar at 24 GHz: first measurement trialsPublication . Ferreira Sardo, Andre; Reis, João R.; Duarte, Luis; Leonor, Nuno; Ribeiro, Carlos; Caldeirinha, Rafael F. S.This paper presents the first measurement trials for performance assessment of a real-time and high resolution monostatic radar operating at 24 GHz. The proposed real-time radar, which operates based on the sliding correlation of pseudo-noise (PN) sequences, provides a high time resolution better than 4 ns, useful for moving target identification (MTI) in the presence of highly dense clutter, under harsh environments and severe weather conditions (fog, snow and fire smoke or plume). The STDCC radar target detection capability is demonstrated in this paper, by measuring and identifying the radar data for 4 distinct scenarios, composed of multiple targets (up to 8), inside an anechoic chamber, demonstrating the potential of the proposed radar architecture.
- Multi-Gigabit/s OFDM real-time based transceiver engine for emerging 5G MIMO systemsPublication . Ribeiro, Carlos; Gomes, Rodolfo; Duarte, Luís; Hammoudeh, Akram; Caldeirinha, Rafael F. S.This paper presents a highly scalable multi-Gigabit/s Real-Time (RT) Wideband (WB) Orthogonal Frequency Division Multiplexing (OFDM) processing chain for 5G applications. It is aimed to significantly reduce the Hardware (HW) footprint of Multiple Input Multiple Output (MIMO) systems. In this context, implementation complexity results for MIMO configurations of 2 × 2, 4 × 4 and 8 × 8, enabled at sampling rates of 245.76, 122.88, 61.44 and 30.72 MHz, respectively, are compared with the ones from conventional MIMO architectures. For example, for a 8 × 8 MIMO–OFDM configuration implementation, savings of up to 87% are achieved when compared with conventional design methods, in terms of DSP48E1 slices. Moreover, in a Xilinx Virtex 7 XC7VX485T, it is shown that a second processing branch might be implemented, leading to a 5 Gbps (using 1024 Quadrature Amplitude Modulation (QAM)) Single-Input Single-Output (SISO) link or a 16 × 16 MIMO configuration. Finally, in order to validate the proposed architecture, the impact of its inclusion on a complete Field Programmable Gate Array (FPGA) 8 × 8 OFDM system, at LTE's highest sampling rate of 30.72 MHz, is evaluated. Subsequently, it is demonstrated that this does not affect the performance of OFDM, even in the presence of Carrier Frequency Offset (CFO).
- A novel MIMO-OFDM Alamouti architecture for 5G systems at 26 GHzPublication . Gomes, Rodolfo; Duarte, Luis; Ribeiro, Carlos; Hammoudeh, Akram; Caldeirinha, Rafael F. S.This paper introduces a novel 5G Millimetre-wave (mmWave) real-time Multiple-Input Multiple-Output (MIMO) testbed architecture aimed to tackle the 5G communication requirements. In this context, a 2x2 Alamouti coder and decoder is implemented in the VC707 Field Programmable Gate Array (FPGA) development board and its logical resources usage compared to those in the literature. In order to reduce the Hardware (HW) footprint of the proposed MIMO - Orthogonal Frequency Division Multiplexing (OFDM) Alamouti system, a pipelined modular architecture is considered, in order to boost HW utilisation and performance of MIMO-OFDM systems. A single pair of Inverse Fast Fourier Transform (IFFT)/ Fast Fourier Transform (FFT) is enough to process data for each MIMO antenna path. The achieved results show the importance of FPGA resource optimisation, demonstrating how depend coding and modulation are to hardware resources. Moreover, a Radio Frequency (RF) architecture is proposed to address 2x2 MIMO communications at 26 GHz.