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Substrate noise isolation improvement in a single-well standard CMOS process

dc.contributor.authorSantos, P. Mendonça dos
dc.contributor.authorMoreira Mendes, Luís Miguel
dc.contributor.authorJoão Caldinhas Vaz
dc.date.accessioned2025-06-23T14:41:26Z
dc.date.available2025-06-23T14:41:26Z
dc.date.issued2016-01
dc.description.abstractThis work describes a fully CMOS compatible methodology, which makes available a pseudo deep n-well in single-well standard CMOS process. The proposed method is based on mask manipulation to accommodate the field implant p-type region into the n-well, and does not require any additional masks or modification in the CMOS process flow. According to the experimental results, the floating NMOS made available by the methodology shows a reduction in the threshold voltage, which implies a slight improvement in its performance, when compared with its standard NMOS counterpart. It was also experimentally demonstrated up to 3 GHz, that the guard-ring field implant/pseudo deep n-well proposed structure improves substrate noise isolation when compared to the classical p+ guard-ring, with a maximum improvement above 20 dB for low frequencies and a minimum of 4 dB at 3 GHz.por
dc.description.sponsorshipThis work was funded by FCT projects UID/EEA/50008/2013 and PEst-OE/EEI/LA0008/2014.
dc.identifier.citationP. Mendonça dos Santos, Luís Mendes, João Caldinhas Vaz, Substrate noise isolation improvement in a single-well standard CMOS process, Integration, Volume 52, 2016, Pages 122-128, ISSN 0167-9260, https://doi.org/10.1016/j.vlsi.2015.09.006
dc.identifier.doi10.1016/j.vlsi.2015.09.006
dc.identifier.issn0167-9260
dc.identifier.urihttp://hdl.handle.net/10400.8/13380
dc.language.isoeng
dc.peerreviewedyes
dc.publisherElsevier BV
dc.relationStrategic Project - LA 8 - 2013-2014
dc.relationUID/EEA/50008/2013
dc.relation.hasversionhttps://www.sciencedirect.com/science/article/pii/S0167926015001212?via%3Dihub
dc.relation.ispartofIntegration
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/4.0/
dc.subjectCMOS technology
dc.subjectMOSFET
dc.subjectIntegrated circuit noise
dc.titleSubstrate noise isolation improvement in a single-well standard CMOS processeng
dc.typejournal article
dspace.entity.typePublication
oaire.awardTitleStrategic Project - LA 8 - 2013-2014
oaire.awardURIhttp://hdl.handle.net/10400.8/12984
oaire.awardURIinfo:eu-repo/grantAgreement/FCT/5876/UID%2FEEA%2F50008%2F2013/PT
oaire.citation.endPage128
oaire.citation.startPage122
oaire.citation.titleIntegration: the VLSI Journal
oaire.citation.volume52
oaire.fundingStream6817 - DCRRNI ID
oaire.fundingStream5876
oaire.versionhttp://purl.org/coar/version/c_970fb48d4fbd8a85
person.familyNameMoreira Mendes
person.givenNameLuís Miguel
person.identifier.ciencia-id0A11-CBD0-48A2
project.funder.identifierhttp://doi.org/10.13039/501100001871
project.funder.nameFundação para a Ciência e a Tecnologia
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relation.isAuthorOfPublication.latestForDiscovery6651dc04-a958-4198-a5fa-a5b665e08656
relation.isProjectOfPublication5ff93f54-75ba-48da-8a10-c54ab3a373f5
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relation.isProjectOfPublication.latestForDiscovery5ff93f54-75ba-48da-8a10-c54ab3a373f5

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