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A Jitter Insertion and Accumulation Model for Clock Repeaters

datacite.subject.fosCiências Naturais::Ciências da Computação e da Informação
datacite.subject.fosCiências Naturais::Matemáticas
datacite.subject.sdg03:Saúde de Qualidade
datacite.subject.sdg07:Energias Renováveis e Acessíveis
datacite.subject.sdg11:Cidades e Comunidades Sustentáveis
dc.contributor.authorFigueiredo, Mónica
dc.contributor.authorAguiar, Rui L.
dc.date.accessioned2026-02-18T15:29:52Z
dc.date.available2026-02-18T15:29:52Z
dc.date.issued2012
dc.description.abstractThis paper presents a model to estimate jitter insertion and accumulation in clock repeaters. We propose expressions to estimate, with low computational effort, both static and dynamic clock jitter insertion in repeaters with different sizes, interconnects and slew-rates. It requires only the pre-characterization of a reference repeater, which can be accomplished with a small number of simulations or measurements. Furthermore, we propose expressions for dynamic jitter accumulation that considers the dual nature of power and ground noise impact on delay. The complete model can be used to replace time-consuming transient noise simulations when evaluating jitter in clock distribution systems, and provide valuable insights regarding the impact of design parameters on jitter. Presented results show that our models can estimate jitter insertion and accumulation with an error within 10% of simulation results, for typical designs, and accurately reflect the impact of changing design parameters.eng
dc.description.sponsorshipThis research was supported in part by Fundação para a Ciência e a Tecnologia, by the grant BD/30654/2006.
dc.identifier.citationMónica FIGUEIREDO, Rui L. AGUIAR, A Jitter Insertion and Accumulation Model for Clock Repeaters, IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, 2012, Volume E95.A, Issue 12, Pages 2430-2442, Released on J-STAGE December 01, 2012, Online ISSN 1745-1337, Print ISSN 0916-8508, https://doi.org/10.1587/transfun.E95.A.2430
dc.identifier.doi10.1587/transfun.e95.a.2430
dc.identifier.issn0916-8508
dc.identifier.issn1745-1337
dc.identifier.urihttp://hdl.handle.net/10400.8/15672
dc.language.isoeng
dc.peerreviewedyes
dc.publisherInstitute of Electronics, Information and Communications Engineers (IEICE)
dc.relation.ispartofIEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
dc.rights.uriN/A
dc.subjectJitter
dc.subjectNoise
dc.subjectCMOS clock repeaters
dc.titleA Jitter Insertion and Accumulation Model for Clock Repeaterseng
dc.typejournal article
dspace.entity.typePublication
oaire.citation.endPage2442
oaire.citation.issue12
oaire.citation.startPage2430
oaire.citation.titleEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
oaire.citation.volumeE95.A
oaire.versionhttp://purl.org/coar/version/c_970fb48d4fbd8a85
person.familyNameFigueiredo
person.givenNameMónica
person.identifier.ciencia-id9111-8C1F-AFCD
person.identifier.orcid0000-0002-0780-3725
person.identifier.scopus-author-id24469657000
relation.isAuthorOfPublicationb31235fc-ac6f-4b97-8665-ad80c78f79d7
relation.isAuthorOfPublication.latestForDiscoveryb31235fc-ac6f-4b97-8665-ad80c78f79d7

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