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- A Software-Defined Radio for Future Wireless Communication Systems at 60 GHzPublication . Gomes, Rodolfo; Duarte, Luis; Ribeiro, Carlos; Caldeirinha, RafaelThis paper reports on a complete end-to-end 5G mmWave testbed fully reconfigurable based on a FPGA architecture. The proposed system is composed of a baseband/low-IF processing unit, and a mmWave RF front-end at both TX/RX ends. In particular, the baseband unit design is based on a typical agile digital IF architecture, enabling on-the-fly modulations up to 256-QAM. The real-time 5G mmWave testbed, herein presented, adopts OFDM as the transmission scheme waveform, which was assessed OTA by considering the key performance indicators, namely EVM and BER. A detailed overview of system architecture is addressed together with the hardware considerations taken into account for the mmWave testbed development. Following this, it is demonstrated that the proposed testbed enables real-time multi-stream transmissions of UHD video content captured by nine individual cameras, which is in fact one of the killing applications for 5G.
- Multi-Gigabit/s OFDM real-time based transceiver engine for emerging 5G MIMO systemsPublication . Ribeiro, Carlos; Gomes, Rodolfo; Duarte, Luís; Hammoudeh, Akram; Caldeirinha, Rafael F. S.This paper presents a highly scalable multi-Gigabit/s Real-Time (RT) Wideband (WB) Orthogonal Frequency Division Multiplexing (OFDM) processing chain for 5G applications. It is aimed to significantly reduce the Hardware (HW) footprint of Multiple Input Multiple Output (MIMO) systems. In this context, implementation complexity results for MIMO configurations of 2 × 2, 4 × 4 and 8 × 8, enabled at sampling rates of 245.76, 122.88, 61.44 and 30.72 MHz, respectively, are compared with the ones from conventional MIMO architectures. For example, for a 8 × 8 MIMO–OFDM configuration implementation, savings of up to 87% are achieved when compared with conventional design methods, in terms of DSP48E1 slices. Moreover, in a Xilinx Virtex 7 XC7VX485T, it is shown that a second processing branch might be implemented, leading to a 5 Gbps (using 1024 Quadrature Amplitude Modulation (QAM)) Single-Input Single-Output (SISO) link or a 16 × 16 MIMO configuration. Finally, in order to validate the proposed architecture, the impact of its inclusion on a complete Field Programmable Gate Array (FPGA) 8 × 8 OFDM system, at LTE's highest sampling rate of 30.72 MHz, is evaluated. Subsequently, it is demonstrated that this does not affect the performance of OFDM, even in the presence of Carrier Frequency Offset (CFO).
- 5G: performance and evaluation of FS‐FBMC against OFDM for high data rate applications at 60 GHzPublication . Gomes, Rodolfo; VITORINO REIS, JOÃO RICARDO; Al‐Daher, Zaid; Hammoudeh, Akram; Caldeirinha, RafaelThis study presents a frequency spreading filter bank multi-carrier (FS-FBMC) waveform as a potential candidate for the fifth generation (5G) network applications at millimetre-waves (mmWaves). The proposed model is developed based on the orthogonal frequency division multiplexing (OFDM) waveform standardised by IEEE 802.15.3c for 60 GHz high data-rate applications. The effects of non-linearities of power amplifiers (PAs) at 60 GHz for both OFDM and FS-FBMC are presented and compared using a realistic PA model. In particular, the sensitivity of both transmission schemes to the non-linear effects is investigated and its impact on the performance degradation in terms of output-power-backoff, is characterised over typical indoor line-of-sight, kiosk and residential, 60 GHz IEEE channel models. The assessment metrics considered are bit error rate and out-of-band emissions. This study concludes radio access schemes for future communication generations, i.e. 5G may employ OFDM for up-link and FS-FBMC for down-link due to the sensitivity to PA non-linearities of both waveforms.
- A novel MIMO-OFDM Alamouti architecture for 5G systems at 26 GHzPublication . Gomes, Rodolfo; Duarte, Luis; Ribeiro, Carlos; Hammoudeh, Akram; Caldeirinha, Rafael F. S.This paper introduces a novel 5G Millimetre-wave (mmWave) real-time Multiple-Input Multiple-Output (MIMO) testbed architecture aimed to tackle the 5G communication requirements. In this context, a 2x2 Alamouti coder and decoder is implemented in the VC707 Field Programmable Gate Array (FPGA) development board and its logical resources usage compared to those in the literature. In order to reduce the Hardware (HW) footprint of the proposed MIMO - Orthogonal Frequency Division Multiplexing (OFDM) Alamouti system, a pipelined modular architecture is considered, in order to boost HW utilisation and performance of MIMO-OFDM systems. A single pair of Inverse Fast Fourier Transform (IFFT)/ Fast Fourier Transform (FFT) is enough to process data for each MIMO antenna path. The achieved results show the importance of FPGA resource optimisation, demonstrating how depend coding and modulation are to hardware resources. Moreover, a Radio Frequency (RF) architecture is proposed to address 2x2 MIMO communications at 26 GHz.