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DLL architecture for OFDM based VLC transceivers in FPGA

2016-07Conference paper Restricted access
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dc.contributor.authorDuarte, Luis
dc.contributor.authorRodrigues, Luis
dc.contributor.authorAlves, Luis N.
dc.contributor.authorRibeiro, Carlos
dc.contributor.authorFigueiredo, Mónica
dc.date.accessioned2025-05-20T13:19:40Z
dc.date.available2025-05-20T13:19:40Z
dc.date.issued2016-07
dc.description.abstractThis paper addresses the problem of achieving high bandwidth in a DLL design for OFDM based VLC broadcast systems. It describes the implementation of efficient Data Link Layer (DLL) and Forward Error Correction (FEC) modules in a Xilinx FPGA. The proposed DLL aims at furnishing the adequate means to fragment and route both high data-rate (HDR) and moderate data-rate (MDR) service requests while maintaining a continuous transmission flow. The FEC modules aims at providing sufficient error correction capabilities with reasonable computation overheads. Another goal was to develop these modules under a globally asynchronous locally synchronous paradigm, ensuring high modularity and performance.eng
dc.description.sponsorshipThis work is funded by FCT/MEC through national funds and when applicable co-funded by FEDER – PT2020 partnership agreement under the project UID/EEA/50008/2013. The work of Carlos Ribeiro was financially supported by FCT/MEC and its funding program under the postdoctoral grant SFRH/BPD/104212/2014.
dc.identifier.citationL. Duarte, L. Rodrigues, L. N. Alves, C. Ribeiro and M. Figueiredo, "DLL architecture for OFDM based VLC transceivers in FPGA," 2016 10th International Symposium on Communication Systems, Networks and Digital Signal Processing (CSNDSP), Prague, Czech Republic, 2016, pp. 1-6, doi: 10.1109/CSNDSP.2016.7573949.
dc.identifier.doi10.1109/csndsp.2016.7573949
dc.identifier.eissn978-1-5090-2526-8
dc.identifier.urihttp://hdl.handle.net/10400.8/12938
dc.language.isoeng
dc.peerreviewedn/a
dc.publisherIEEE Canada
dc.relationUID/EEA/50008/2013
dc.relationSFRH/BPD/104212/2014
dc.relation.hasversionhttps://ieeexplore.ieee.org/document/7573949
dc.relation.ispartof2016 10th International Symposium on Communication Systems, Networks and Digital Signal Processing (CSNDSP)
dc.rights.uriN/A
dc.subjectVisible Light Communications
dc.subjectData Link Layer
dc.subjectFPGA
dc.subjectMicroBlaze Soft Core
dc.titleDLL architecture for OFDM based VLC transceivers in FPGA
dc.typeconference paper
dspace.entity.typePublication
oaire.awardURIinfo:eu-repo/grantAgreement/FCT/5876/UID%2FEEA%2F50008%2F2013/PT
oaire.citation.conferenceDate2016-09
oaire.citation.conferencePlacePrague, Czech Republic
oaire.citation.titleInternational Symposium on Communication Systems, Networks and Digital Signal Processing (CSNDSP)
oaire.fundingStream5876
oaire.versionhttp://purl.org/coar/version/c_be7fb7dd8ff6fe43
person.familyNameRibeiro
person.familyNameFigueiredo
person.givenNameCarlos
person.givenNameMónica
person.identifier.orcid0000-0001-7484-6779
person.identifier.orcid0000-0002-0780-3725
project.funder.identifierhttp://doi.org/10.13039/501100001871
project.funder.nameFundação para a Ciência e a Tecnologia
relation.isAuthorOfPublicationa388f639-664e-435c-8e1a-d6aee9213f70
relation.isAuthorOfPublicationb31235fc-ac6f-4b97-8665-ad80c78f79d7
relation.isAuthorOfPublication.latestForDiscoverya388f639-664e-435c-8e1a-d6aee9213f70
relation.isProjectOfPublicationf047085f-2057-404f-992e-a4f6ee3db7b3
relation.isProjectOfPublication.latestForDiscoveryf047085f-2057-404f-992e-a4f6ee3db7b3

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