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DLL architecture for OFDM based VLC transceivers in FPGA

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This paper addresses the problem of achieving high bandwidth in a DLL design for OFDM based VLC broadcast systems. It describes the implementation of efficient Data Link Layer (DLL) and Forward Error Correction (FEC) modules in a Xilinx FPGA. The proposed DLL aims at furnishing the adequate means to fragment and route both high data-rate (HDR) and moderate data-rate (MDR) service requests while maintaining a continuous transmission flow. The FEC modules aims at providing sufficient error correction capabilities with reasonable computation overheads. Another goal was to develop these modules under a globally asynchronous locally synchronous paradigm, ensuring high modularity and performance.

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Visible Light Communications Data Link Layer FPGA MicroBlaze Soft Core

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Citation

L. Duarte, L. Rodrigues, L. N. Alves, C. Ribeiro and M. Figueiredo, "DLL architecture for OFDM based VLC transceivers in FPGA," 2016 10th International Symposium on Communication Systems, Networks and Digital Signal Processing (CSNDSP), Prague, Czech Republic, 2016, pp. 1-6, doi: 10.1109/CSNDSP.2016.7573949.

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