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Accelerating floating-point fitness functions in evolutionary algorithms: a FPGA-CPU-GPU performance comparison

dc.contributor.authorGomez-Pulido, Juan A.
dc.contributor.authorVega-Rodriguez, Miguel A.
dc.contributor.authorSanchez-Perez, Juan M.
dc.contributor.authorPriem-Mendes, Silvio
dc.contributor.authorCarreira, Vitor
dc.date.accessioned2025-12-17T17:26:27Z
dc.date.available2025-12-17T17:26:27Z
dc.date.issued2011-04-20
dc.description.abstractMany large combinatorial optimization problems tackled with evolutionary algorithms often require very high computational times, usually due to the fitness evaluation. This fact forces programmers to use clusters of computers, a computational solution very useful for running applications of intensive calculus but having a high acquisition price and operation cost, mainly due to the Central Processing Unit (CPU) power consumption and refrigeration devices. A low-cost and high-performance alternative comes from reconfigurable computing, a hardware technology based on Field Programmable Gate Array devices (FPGAs). The main objective of the work presented in this paper is to compare implementations on FPGAs and CPUs of different fitness functions in evolutionary algorithms in order to study the performance of the floating-point arithmetic in FPGAs and CPUs that is often present in the optimization problems tackled by these algorithms. We have taken advantage of the parallelism at chip-level of FPGAs pursuing the acceleration of the fitness functions (and consequently, of the evolutionary algorithms) and showing the parallel scalability to reach low cost, low power and high performance computational solutions based on FPGA. Finally, the recent popularity of GPUs as computational units has moved us to introduce these devices in our performance comparisons. We analyze performance in terms of computation times and economic cost.eng
dc.description.sponsorshipThis work was partially funded by the Spanish Ministry of Science and Innovation and ERDF (the European Regional Development Fund), under the contract TIN2008-06491-C04-04 (the MSTAR project).
dc.identifier.citationGomez-Pulido, J.A., Vega-Rodriguez, M.A., Sanchez-Perez, J.M. et al. Accelerating floating-point fitness functions in evolutionary algorithms: a FPGA-CPU-GPU performance comparison. Genet Program Evolvable Mach 12, 403–427 (2011). https://doi.org/10.1007/s10710-011-9137-2
dc.identifier.doi10.1007/s10710-011-9137-2
dc.identifier.issn1389-2576
dc.identifier.issn1573-7632
dc.identifier.urihttp://hdl.handle.net/10400.8/15138
dc.language.isoeng
dc.peerreviewedyes
dc.publisherSpringer Science and Business Media LLC
dc.relation.hasversionhttps://link.springer.com/article/10.1007/s10710-011-9137-2
dc.relation.ispartofGenetic Programming and Evolvable Machines
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/4.0/
dc.subjectFPGA
dc.subjectEvolutionary algorithms
dc.subjectFitness
dc.subjectReconfigurable circuits
dc.subjectGPU
dc.subjectFloating-Point
dc.subjectPerformance
dc.subjectParallelism
dc.titleAccelerating floating-point fitness functions in evolutionary algorithms: a FPGA-CPU-GPU performance comparisoneng
dc.typejournal article
dspace.entity.typePublication
oaire.citation.endPage427
oaire.citation.issue4
oaire.citation.startPage403
oaire.citation.titleGenetic Programming and Evolvable Machines
oaire.citation.volume12
oaire.versionhttp://purl.org/coar/version/c_970fb48d4fbd8a85
person.familyNameMendes
person.givenNameSilvio
person.identifier.ciencia-id1513-13E9-C8A6
person.identifier.orcid0000-0002-1667-5745
relation.isAuthorOfPublicatione23cc83a-4e70-4088-a73d-075808bda28f
relation.isAuthorOfPublication.latestForDiscoverye23cc83a-4e70-4088-a73d-075808bda28f

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